v_sad_u32 GPU Native ISA AMD Vector

V SAD U32 Vector Arithmetic

v_sad_u32

Calculate the absolute difference of two unsigned 32-bit integer inputs, add an unsigned 32-bit integer value from the third input and store the…

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (VOP3) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format VOP3
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

TargetSupport
gfx1100✅ Supported

Related PTX Concepts

Sum of Absolute Differences ↗
equivalent with restrictions
sad (PTX)

Related

More in Vector Arithmetic

Reference

AMDGPU / GFX ISA

Description

Calculate the absolute difference of two unsigned 32-bit integer inputs, add an unsigned 32-bit integer value from the third input and store the result into a vector register.

Semantics

ABSDIFF = lambda(x, y) ( x > y ? x - y : y - x); // UNSIGNED comparison D0.u32 = ABSDIFF(S0.u32, S1.u32) + S2.u32

Example

v_sad_u32 v5, v1, v2, s3

A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.

Sources