v_screen_partition_4se_b32 GPU Native ISA AMD Vector

V SCREEN PARTITION 4SE B32 Vector Arithmetic

v_screen_partition_4se_b32

4SE version of LUT instruction for screen partitioning/filtering.

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (VOP1) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format VOP1
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

More in Vector Arithmetic

Reference

AMDGPU / GFX ISA

Description

4SE version of LUT instruction for screen partitioning/filtering. This opcode is intended to help accelerate screen partitioning in the 4SE case only. 2SE and 1SE cases use normal ALU instructions.

Sources