v_interp_p1_f32 GPU Native ISA AMD Vector

V INTERP P1 F32 Vector Arithmetic

v_interp_p1_f32

Given the I coordinate in a vector register and an attribute specifier, load parameter data from the local data share, compute the first part of…

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (VOP3) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format VOP3
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

More in Vector Arithmetic

Reference

AMDGPU / GFX ISA

Description

Given the I coordinate in a vector register and an attribute specifier, load parameter data from the local data share, compute the first part of parameter interpolation and store the intermediate result into a vector register. Use V_INTERP_P2_F32 to complete the operation.

Sources