AMDGPU Opcode Map
Reverse lookup instructions by their hexadecimal encoding.
| Opcode | Mnemonic | Syntax | Format | Name |
|---|---|---|---|---|
| s_cmpk_ge_u32 | s_cmpk_ge_u32 | SOPK | S CMPK GE U32 | |
| s_cmpk_gt_i32 | s_cmpk_gt_i32 | SOPK | S CMPK GT I32 | |
| s_cmpk_gt_u32 | s_cmpk_gt_u32 | SOPK | S CMPK GT U32 | |
| s_cmpk_le_i32 | s_cmpk_le_i32 | SOPK | S CMPK LE I32 | |
| s_cmpk_le_u32 | s_cmpk_le_u32 | SOPK | S CMPK LE U32 | |
| s_cmpk_lg_i32 | s_cmpk_lg_i32 | SOPK | S CMPK LG I32 | |
| s_cmpk_lg_u32 | s_cmpk_lg_u32 | SOPK | S CMPK LG U32 | |
| s_cmpk_lt_i32 | s_cmpk_lt_i32 | SOPK | S CMPK LT I32 | |
| s_cmpk_lt_u32 | s_cmpk_lt_u32 | SOPK | S CMPK LT U32 | |
| s_cselect_b32 | s_cselect_b32 | SOP2 | S CSELECT B32 | |
| s_cselect_b64 | s_cselect_b64 | SOP2 | S CSELECT B64 | |
| s_ctz_i32_b32 | s_ctz_i32_b32 | SOP1 | S CTZ I32 B32 | |
| s_ctz_i32_b64 | s_ctz_i32_b64 | SOP1 | S CTZ I32 B64 | |
| s_cvt_f16_f32 | s_cvt_f16_f32 | SOP1 | S CVT F16 F32 | |
| s_cvt_f32_f16 | s_cvt_f32_f16 | SOP1 | S CVT F32 F16 | |
| s_cvt_f32_i32 | s_cvt_f32_i32 | SOP1 | S CVT F32 I32 | |
| s_cvt_f32_u32 | s_cvt_f32_u32 | SOP1 | S CVT F32 U32 | |
| s_cvt_hi_f32_f16 | s_cvt_hi_f32_f16 | SOP1 | S CVT HI F32 F16 | |
| s_cvt_i32_f32 | s_cvt_i32_f32 | SOP1 | S CVT I32 F32 | |
| s_cvt_pk_rtz_f16_f32 | s_cvt_pk_rtz_f16_f32 | SOP2 | S CVT PK RTZ F16 F32 | |
| s_cvt_u32_f32 | s_cvt_u32_f32 | SOP1 | S CVT U32 F32 | |
| s_dcache_inv | s_dcache_inv | SMEM | S DCACHE INV | |
| s_dcache_inv_vol | s_dcache_inv_vol | SMEM | S DCACHE INV VOL | |
| s_dcache_wb | s_dcache_wb | SMEM | S DCACHE WB | |
| s_dcache_wb_vol | s_dcache_wb_vol | SMEM | S DCACHE WB VOL | |
| s_decperflevel | s_decperflevel | SOPP | S DECPERFLEVEL | |
| s_delay_alu | s_delay_alu | SOPP | S DELAY ALU | |
| s_endpgm | s_endpgm | SOPP | S ENDPGM | |
| s_endpgm_saved | s_endpgm_saved | SOPP | S ENDPGM SAVED | |
| s_ff0_i32_b32 | s_ff0_i32_b32 | SOP1 | S FF0 I32 B32 | |
| s_ff0_i32_b64 | s_ff0_i32_b64 | SOP1 | S FF0 I32 B64 | |
| s_ff1_i32_b32 | s_ff1_i32_b32 | SOP1 | S FF1 I32 B32 | |
| s_ff1_i32_b64 | s_ff1_i32_b64 | SOP1 | S FF1 I32 B64 | |
| s_flbit_i32 | s_flbit_i32 | SOP1 | S FLBIT I32 | |
| s_flbit_i32_b32 | s_flbit_i32_b32 | SOP1 | S FLBIT I32 B32 | |
| s_flbit_i32_b64 | s_flbit_i32_b64 | SOP1 | S FLBIT I32 B64 | |
| s_flbit_i32_i64 | s_flbit_i32_i64 | SOP1 | S FLBIT I32 I64 | |
| s_floor_f16 | s_floor_f16 | SOP1 | S FLOOR F16 | |
| s_floor_f32 | s_floor_f32 | SOP1 | S FLOOR F32 | |
| s_get_barrier_state | s_get_barrier_state | SOP1 | S GET BARRIER STATE | |
| s_get_pc_i64 | s_get_pc_i64 | SOP1 | S GET PC I64 | |
| s_get_shader_cycles_u64 | s_get_shader_cycles_u64 | SOP1 | S GET SHADER CYCLES U64 | |
| s_get_waveid_in_workgroup | s_get_waveid_in_workgroup | SMEM | S GET WAVEID IN WORKGROUP | |
| s_getpc_b64 | s_getpc_b64 | SOP1 | S GETPC B64 | |
| s_gl1_inv | s_gl1_inv | SMEM | S GL1 INV | |
| s_icache_inv | s_icache_inv | SOPP | S ICACHE INV | |
| s_incperflevel | s_incperflevel | SOPP | S INCPERFLEVEL | |
| s_load_dword | s_load_dword SDST, SBASE, offset | SMEM | S LOAD DWORD | |
| s_lshl1_add_u32 | s_lshl1_add_u32 | SOP2 | S LSHL1 ADD U32 | |
| s_lshl2_add_u32 | s_lshl2_add_u32 | SOP2 | S LSHL2 ADD U32 | |
| s_lshl3_add_u32 | s_lshl3_add_u32 | SOP2 | S LSHL3 ADD U32 | |
| s_lshl4_add_u32 | s_lshl4_add_u32 | SOP2 | S LSHL4 ADD U32 | |
| s_lshl_b32 | s_lshl_b32 | SOP2 | S LSHL B32 | |
| s_lshl_b64 | s_lshl_b64 | SOP2 | S LSHL B64 | |
| s_lshr_b32 | s_lshr_b32 | SOP2 | S LSHR B32 | |
| s_lshr_b64 | s_lshr_b64 | SOP2 | S LSHR B64 | |
| s_max_f16 | s_max_f16 | SOP2 | S MAX F16 | |
| s_max_f32 | s_max_f32 | SOP2 | S MAX F32 | |
| s_max_i32 | s_max_i32 | SOP2 | S MAX I32 | |
| s_max_num_f16 | s_max_num_f16 | SOP2 | S MAX NUM F16 | |
| s_max_num_f32 | s_max_num_f32 | SOP2 | S MAX NUM F32 | |
| s_max_u32 | s_max_u32 | SOP2 | S MAX U32 | |
| s_maximum_f16 | s_maximum_f16 | SOP2 | S MAXIMUM F16 | |
| s_maximum_f32 | s_maximum_f32 | SOP2 | S MAXIMUM F32 | |
| s_memrealtime | s_memrealtime | SMEM | S MEMREALTIME | |
| s_memtime | s_memtime | SMEM | S MEMTIME | |
| s_min_f16 | s_min_f16 | SOP2 | S MIN F16 | |
| s_min_f32 | s_min_f32 | SOP2 | S MIN F32 | |
| s_min_i32 | s_min_i32 | SOP2 | S MIN I32 | |
| s_min_num_f16 | s_min_num_f16 | SOP2 | S MIN NUM F16 | |
| s_min_num_f32 | s_min_num_f32 | SOP2 | S MIN NUM F32 | |
| s_min_u32 | s_min_u32 | SOP2 | S MIN U32 | |
| s_minimum_f16 | s_minimum_f16 | SOP2 | S MINIMUM F16 | |
| s_minimum_f32 | s_minimum_f32 | SOP2 | S MINIMUM F32 | |
| s_monitor_sleep | s_monitor_sleep | SOPP | S MONITOR SLEEP | |
| s_mov_b32 | s_mov_b32 | SOP1 | S MOV B32 | |
| s_mov_b64 | s_mov_b64 | SOP1 | S MOV B64 | |
| s_movk_i32 | s_movk_i32 | SOPK | S MOVK I32 | |
| s_movreld_b32 | s_movreld_b32 | SOP1 | S MOVRELD B32 | |
| s_movreld_b64 | s_movreld_b64 | SOP1 | S MOVRELD B64 | |
| s_movrels_b32 | s_movrels_b32 | SOP1 | S MOVRELS B32 | |
| s_movrels_b64 | s_movrels_b64 | SOP1 | S MOVRELS B64 | |
| s_movrelsd_2_b32 | s_movrelsd_2_b32 | SOP1 | S MOVRELSD 2 B32 | |
| s_mul_f16 | s_mul_f16 | SOP2 | S MUL F16 | |
| s_mul_f32 | s_mul_f32 | SOP2 | S MUL F32 | |
| s_mul_hi_i32 | s_mul_hi_i32 | SOP2 | S MUL HI I32 | |
| s_mul_hi_u32 | s_mul_hi_u32 | SOP2 | S MUL HI U32 | |
| s_mul_i32 | s_mul_i32 SDST, S0, S1 | SOP2 | S MUL I32 | |
| s_mul_u64 | s_mul_u64 | SOP2 | S MUL U64 | |
| s_mulk_i32 | s_mulk_i32 | SOPK | S MULK I32 | |
| s_nand_b32 | s_nand_b32 | SOP2 | S NAND B32 | |
| s_nand_b64 | s_nand_b64 | SOP2 | S NAND B64 | |
| s_nand_saveexec_b32 | s_nand_saveexec_b32 | SOP1 | S NAND SAVEEXEC B32 | |
| s_nand_saveexec_b64 | s_nand_saveexec_b64 | SOP1 | S NAND SAVEEXEC B64 | |
| s_nop | s_nop | SOPP | S NOP | |
| s_nor_b32 | s_nor_b32 | SOP2 | S NOR B32 | |
| s_nor_b64 | s_nor_b64 | SOP2 | S NOR B64 | |
| s_nor_saveexec_b32 | s_nor_saveexec_b32 | SOP1 | S NOR SAVEEXEC B32 | |
| s_nor_saveexec_b64 | s_nor_saveexec_b64 | SOP1 | S NOR SAVEEXEC B64 | |
| s_not_b32 | s_not_b32 | SOP1 | S NOT B32 |