v_dual_dot2acc_f32_f16 GPU Native ISA AMD Vector

Vector Arithmetic

v_dual_dot2acc_f32_f16

Compute the dot product of two packed 2-D half-precision float inputs in the single-precision float domain and accumulate the resulting…

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (VOPD) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format VOPD

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

More in Vector Arithmetic

Reference

AMDGPU / GFX ISA

Description

Compute the dot product of two packed 2-D half-precision float inputs in the single-precision float domain and accumulate the resulting single-precision float value into the destination vector register. The initial value in D is used as S2.

Sources