v_dual_lshrrev_b32 GPU Native ISA AMD Vector
Vector Arithmetic
v_dual_lshrrev_b32
Given a shift count in the first vector input, calculate the logical shift right of the second vector input and store the result into a vector…
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (VOPD)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Vector Arithmetic
Reference
AMDGPU / GFX ISA
Description
Given a shift count in the first vector input, calculate the logical shift right of the second vector input and store the result into a vector register.
Sources
- AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.