v_ffbh_i32 GPU Native ISA AMD Vector
V FFBH I32 Vector Arithmetic
v_ffbh_i32
Count the number of leading bits that are the same as the sign bit of a vector input and store the result into a vector register.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (VOP1)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related PTX Concepts
Related
More in Vector Arithmetic
Reference
AMDGPU / GFX ISA
Description
Count the number of leading bits that are the same as the sign bit of a vector input and store the result into a vector register. Store -1 if all input bits are the same.
Semantics
D0.i32 = -1;
// Set if all bits are the same
for i in 1 : 31 do
// Search from MSB
if S0.i32[31 - i] != S0.i32[31] then
D0.i32 = i;
break
endif
endfor
Example
V_FFBH_I32(0x00000000) => 0xffffffff
V_FFBH_I32(0x40000000) => 1
V_FFBH_I32(0x80000000) => 1
V_FFBH_I32(0x0fffffff) => 4Reproduced from AMD's official "AMD Instinct MI300" ISA Reference Guide for technical accuracy.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 201.