v_cubeid_f32 GPU Native ISA AMD Vector
V CUBEID F32 Vector Arithmetic
v_cubeid_f32
Compute the cubemap face ID of a 3D coordinate specified as three single-precision float inputs.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (VOP3)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx1100 | ✅ Supported |
Related
More in Vector Arithmetic
Reference
AMDGPU / GFX ISA
Description
Compute the cubemap face ID of a 3D coordinate specified as three single-precision float inputs. Store the result in single-precision float format into a vector register.
Semantics
// Set D0.f = cubemap face ID ({0.0, 1.0, ..., 5.0}).
// XYZ coordinate is given in (S0.f, S1.f, S2.f).
// S0.f = x
// S1.f = y
// S2.f = z
if ((abs(S2.f32) >= abs(S0.f32)) && (abs(S2.f32) >= abs(S1.f32))) then
if S2.f32 < 0.0F then
D0.f32 = 5.0F
else
D0.f32 = 4.0F
endif
elsif abs(S1.f32) >= abs(S0.f32) then
if S1.f32 < 0.0F then
D0.f32 = 3.0F
else
D0.f32 = 2.0F
endif
else
if S0.f32 < 0.0F then
D0.f32 = 1.0F
else
D0.f32 = 0.0F
endif
endif
Example
v_cubeid_f32 v5, v1, v2, s3A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 336. - LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project