v_ashr_pk_i8_i32 GPU Native ISA AMD Vector

V ASHR PK I8 I32 Vector Arithmetic

v_ashr_pk_i8_i32

Given two signed 32-bit integers and a shift count, calculate the arithmetic shift right (preserving sign bit) of the two integers, saturate the two…

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (VOP3) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format VOP3
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

More in Vector Arithmetic

Reference

AMDGPU / GFX ISA

Description

Given two signed 32-bit integers and a shift count, calculate the arithmetic shift right (preserving sign bit) of the two integers, saturate the two results in the signed 8-bit interval [-128, 127], pack the bytes and store the result into a vector register.

Sources