v_add_u16 GPU Native ISA AMD Vector
V ADD U16 Vector Arithmetic
v_add_u16
Add two unsigned 16-bit integer inputs and store the result into a vector register. No carry-in or carry-out support.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (VOP2)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Supports saturation (unsigned 16-bit integer domain).
Related
More in Vector Arithmetic
Reference
AMDGPU / GFX ISA
Semantics
D0.u16 = S0.u16 + S1.u16
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 179.