match.sync GPU Virtual ISA NVIDIA

match.sync Parallel Synchronization and Communication Instructions

match.any.sync.type d, a, membermask;

match.sync will cause executing thread to wait until all non-exited threads from membermask have executed match.sync with the same qualifiers and same membermask value before resuming execution.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 6.0
Minimum Target sm_70

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
match.any.sync.type d, a, membermask; sm_70 match.sync will cause executing thread to wait until all non-exited threads from membermask have executed match.sync with the same qualifiers and same membermask value before resuming execution. (see the official PTX ISA docs for the full description)
match.all.sync.type d[|p], a, membermask; sm_70 match.all returns the mask only if all non-exited threads in membermask share the same value of operand a; the optional predicate p is set accordingly.

Operands

  • d
    Destination register
  • a
    Source operand
  • membermask
    Operand

At a Glance

Data Types -

Related

More in Parallel Synchronization and Communication Instructions

Reference

NVIDIA PTX ISA

Description

match.sync will cause executing thread to wait until all non-exited threads from membermask have executed match.sync with the same qualifiers and same membermask value before resuming execution. Operand membermask specifies a 32-bit integer which is a mask indicating threads participating in this instruction where the bit position corresponds to thread’s laneid. match.sync performs broadcast and compare of operand a across all non-exited threads in membermask and sets destination d and optional predicate p based on mode. Operand a has instruction type and d has.b32 type. Destination d is a 32-bit mask where bit position in mask corresponds to thread’s laneid. (see the official PTX ISA docs for the full description)

Examples

match.any.sync.b32    d, a, 0xffffffff;
match.all.sync.b64    d|p, a, mask;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources