elect.sync GPU Virtual ISA NVIDIA
elect.sync Parallel Synchronization and Communication Instructions
elect.sync d|p, membermask;
elect.sync elects one predicated active leader thread from among a set of threads specified by membermask.
Encoding
PTX is a virtual instruction set. It has no single, stable native
binary encoding - the compiler lowers this instruction to different native machine
code depending on the selected NVIDIA target architecture (compute capability).
This page intentionally shows no bit-diagram; see the target/version requirements
below for what governs how this instruction compiles.
Syntax Forms
One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.
| Syntax | Data Types | State Space(s) | Modifiers | Min. Target | Description |
|---|---|---|---|---|---|
| elect.sync d|p, membermask; | sm_90 | elect.sync elects one predicated active leader thread from among a set of threads specified by membermask. laneid of the elected thread is returned in the 32-bit destination operand d. (see the official PTX ISA docs for the full description) |
Operands
-
d|p
Operand -
membermask
Operand
At a Glance
Related
More in Parallel Synchronization and Communication Instructions
Reference
NVIDIA PTX ISA
Description
elect.sync elects one predicated active leader thread from among a set of threads specified by membermask. laneid of the elected thread is returned in the 32-bit destination operand d. The sink symbol ‘_’ can be used for destination operand d. The predicate destination p is set to True for the leader thread, and False for all other threads.
Operand membermask specifies a 32-bit integer indicating the set of threads from which a leader
is to be elected. The behavior is undefined if the executing thread is not in membermask.
Election of a leader thread happens deterministically, i.e. (see the official PTX ISA docs for the full description)
Examples
elect.sync %r0|%p0, 0xffffffff;Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.
Sources
-
Parallel Thread Execution ISA ↗
- NVIDIA Corporation, Chapter 9 - Instruction Set
Deep-linked directly to this instruction's section.