v_cvt_sr_fp8_f32_gfx12 GPU Native ISA AMD Vector
V CVT SR FP8 F32 GFX12 Vector Arithmetic
v_cvt_sr_fp8_f32_gfx12
AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.)
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (VOP3)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx1100 | ✅ Supported |
Related
More in Vector Arithmetic
Reference
AMDGPU / GFX ISA
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project