tbuffer_store_format_d16_x GPU Native ISA AMD Vector
TBUFFER STORE FORMAT D16 X Buffer Memory
tbuffer_store_format_d16_x
Convert 16 bits of data from vector input registers into 1-component formatted data and store the data into a buffer surface.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (MTBUF)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Buffer Memory
Reference
AMDGPU / GFX ISA
Description
Convert 16 bits of data from vector input registers into 1-component formatted data and store the data into a buffer surface. The instruction specifies the data format of the surface, overriding the resource descriptor.
Semantics
addr = CalcBufferAddr(VADDR.b32, SRSRC.b32, SOFFSET.b32, OFFSET.b32);
MEM[addr + ChannelOffsetX()] = ConvertToFormat(32'B(VDATA[15 : 0].b16));
// Mem access size depends on format
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 480.