tbuffer_load_format_d16_xy GPU Native ISA AMD Vector

Buffer Memory

tbuffer_load_format_d16_xy

Load 2-component formatted data from a buffer surface, convert the data to packed 16 bit integral or floating point format, then store the result…

Also written as tbuffer_load_d16_format_xy. AMD's machine-readable ISA specification lists this name for the same instruction.

Encoding

Binary Layout (AMD CDNA 4)
SOFFSET
63:56
ACC
55
NT
54
SC1
53
SRSRC
52:48
VDATA
47:40
VADDR
39:32
111010
31:26
NFMT
25:23
DFMT
22:19
1001
18:15
SC0
14
IDXEN
13
OFFEN
12
OFFSET
11:0
 

The ENC_MTBUF layout from AMD's machine-readable ISA specification (AMD CDNA 4). Opcode 9 in OP rebuilds 0x00000000E8048000, an identifier AMD lists for this encoding. Not the same in every generation: AMD CDNA 2 (field layout), AMD CDNA 1 (field layout), AMD RDNA 2 (layout not verifiable), AMD RDNA 1 (layout not verifiable). The same in AMD CDNA 3.

Format MTBUF
Width 64 bits
Opcode 9
Identifier 0x00000000E8048000

Operands

  • VDATA
    Written. N/A Data format: Value can be anything. (OPR_VGPR_OR_ACCVGPR, FMT_ANY)
  • VADDR
    Read. N/A Data format: Value can be anything. (OPR_VGPR, FMT_ANY)
  • SRSRC
    Read. N/A Data format: 128-bit buffer resource constant. (OPR_SREG, FMT_RSRC_TYPED)
  • SOFFSET
    Read. N/A Data format: Value can be anything. (OPR_SSRC_NOLIT, FMT_ANY)

In AMD's order, as its machine-readable ISA specification lists them for the ENC_MTBUF encoding (AMD CDNA 4).

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

More in Buffer Memory

Reference

AMDGPU / GFX ISA

Description

Load 2-component formatted data from a buffer surface, convert the data to packed 16 bit integral or floating point format, then store the result into a vector register. The instruction specifies the data format of the surface, overriding the resource descriptor.

Semantics

addr = CalcBufferAddr(VADDR.b32, SRSRC.b32, SOFFSET.b32, OFFSET.b32); VDATA[15 : 0].b16 = 16'B(ConvertFromFormat(MEM[addr + ChannelOffsetX()])); // Mem access size depends on format VDATA[31 : 16].b16 = 16'B(ConvertFromFormat(MEM[addr + ChannelOffsetY()]))

Example

tbuffer_load_format_d16_xy v5, off, s[8:11], s3

A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx9_asm_mtbuf.s). Not from an AMD document, and not authored here.

Sources