buffer_wbl2 GPU Native ISA AMD Vector
Buffer Memory
buffer_wbl2
Write back L2 cache. Returns ACK to shader.
Encoding
Binary Layout (AMD CDNA 4)
SOFFSET
63:56
ACC
55
unassigned
54:53
SRSRC
52:48
VDATA
47:40
VADDR
39:32
111000
31:26
unassigned
25
0101000
24:18
NT
17
LDS
16
SC1
15
SC0
14
IDXEN
13
OFFEN
12
OFFSET
11:0
The ENC_MUBUF layout from AMD's machine-readable ISA specification (AMD CDNA 4). Opcode 40 in OP rebuilds 0x00000000E0A00000, an identifier AMD lists for this encoding. Bits marked unassigned have no field in the specification. Not the same in every generation: AMD CDNA 2 (field layout). The same in AMD CDNA 3.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Buffer Memory
Reference
AMDGPU / GFX ISA
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 468. - AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.