tbuffer_load_format_d16_x GPU Native ISA AMD Vector
TBUFFER LOAD FORMAT D16 X Buffer Memory
tbuffer_load_format_d16_x
Load 1-component formatted data from a buffer surface, convert the data to packed 16 bit integral or floating point format, then store the result…
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (MTBUF)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Buffer Memory
Reference
AMDGPU / GFX ISA
Description
Load 1-component formatted data from a buffer surface, convert the data to packed 16 bit integral or floating point format, then store the result into a vector register. The instruction specifies the data format of the surface, overriding the resource descriptor.
Semantics
addr = CalcBufferAddr(VADDR.b32, SRSRC.b32, SOFFSET.b32, OFFSET.b32);
VDATA[15 : 0].b16 = 16'B(ConvertFromFormat(MEM[addr + ChannelOffsetX()]));
// Mem access size depends on format
// VDATA[31:16].b16 is preserved.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 479.