add GPU Virtual ISA NVIDIA

Add Arithmetic

add.type d, a, b;

Add two operands of the same type, with optional saturation for signed 32-bit integers.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding — the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.0
Minimum Target sm_10

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations — each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
add.type d, a, b; s16, s32, s64, u16, u32, u64, f32, f64, f16, f16x2, bf16, bf16x2 sm_10 Generic add across integer and floating-point types.
add.sat.s32 d, a, b; s32 sat sm_10 Signed 32-bit add with saturation on overflow instead of wraparound.

Operands

  • d
    Destination register
  • a
    First source operand
  • b
    Second source operand

At a Glance

Data Types bf16, bf16x2, f16, f16x2, f32, f64, s16, s32, s64, u16, u32, u64
Modifiers sat

Related AMDGPU Concepts

Integer Addition ↗
equivalent with restrictions
s_add_u32 (AMDGPU)
v_add_u32 (AMDGPU)
Floating-Point Addition ↗
equivalent with restrictions
v_add_f32 (AMDGPU)

Reference

NVIDIA PTX ISA

Semantics

d = a + b, evaluated at the selected type's width.

Sources