neg GPU Virtual ISA NVIDIA

Negate Arithmetic

neg.type d, a;

Negate a signed or floating-point operand.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.0
Minimum Target sm_10

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
neg.type d, a; s16, s32, s64, f32, f64 sm_10 Arithmetic negation.

Operands

  • d
    Destination register
  • a
    Source operand

At a Glance

Data Types f32, f64, s16, s32, s64

Related

More in Arithmetic

Reference

NVIDIA PTX ISA

Description

Negate the sign of a and store the result in d. For.f16x2 and.bf16x2 instruction type, forms input vector by extracting half word values from the source operand. Half-word operands are then negated in parallel to produce.f16x2 or.bf16x2 result in destination. For.f16 instruction type, operands d and a have.f16 or.b16 type. For.f16x2 instruction type, operands d and a have.b32 type. For.bf16 instruction type, operands d and a have.b16 type. For.bf16x2 instruction type, operands d and a have.b32 type.

Semantics

d = -a.

Examples

neg.s32  r0,a;
neg.s8x4 p, q, r;

neg.ftz.f32  x,f0;

neg.ftz.f16  x,f0;
neg.bf16     x,b0;
neg.bf16x2   x1,b1;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources