ds_nop GPU Native ISA AMD Vector

LDS / Data Share

ds_nop

Do nothing.

Encoding

Binary Layout (AMD CDNA 5)
VDST
63:56
DATA1
55:48
DATA0
47:40
ADDR
39:32
110110
31:26
00010100
25:18
unassigned
17:16
OFFSET1
15:8
OFFSET0
7:0
 

The ENC_VDS layout from AMD's machine-readable ISA specification (AMD CDNA 5). Opcode 20 in OP rebuilds 0x00000000D8500000, an identifier AMD lists for this encoding. Bits marked unassigned have no field in the specification. Not the same in every generation: AMD CDNA 4 (encoding ENC_DS, field layout), AMD CDNA 3 (encoding ENC_DS, field layout), AMD CDNA 2 (encoding ENC_DS, field layout), AMD CDNA 1 (encoding ENC_DS, field layout), AMD RDNA 3.5 (encoding ENC_DS, field layout), AMD RDNA 3 (encoding ENC_DS, field layout), AMD RDNA 2 (encoding ENC_DS, field layout), AMD RDNA 1 (encoding ENC_DS, field layout). The same in AMD RDNA 4.

Format DS
Width 64 bits
Opcode 20
Identifier 0x00000000D8500000

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

TargetSupport
gfx1100✅ Supported

Related

More in LDS / Data Share

Reference

AMDGPU / GFX ISA

Sources