x86 Instructions

957 instructions - showing 100 per page, page 4 of 10 - click any row to view encoding, pseudocode, and full documentation.

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Intrinsics → By extension → 100 instructions
Mnemonic ⇅ Syntax Format ⇅ Extension ⇅ Summary
les LES r, m Legacy Base (Legacy) Loads pointer into ES and register.
lfence LFENCE SSE2 SSE2 Serializes load operations (Wait for prior loads to complete).
lfs LFS r, m Legacy Base Loads pointer into FS and register.
lgdt LGDT m16&32 System System Loads the GDT register (Privileged).
lgs LGS r, m Legacy Base Loads pointer into GS and register.
lidt LIDT m16&32 System System Loads the IDT register (Privileged).
lkgs LKGS r16 Legacy LKGS Loads the kernel GS base address (FRED support).
lldt LLDT r/m16 System System Loads LDT segment selector (Privileged).
lmsw LMSW r/m16 System System Loads Machine Status Word (Legacy CR0 modification).
loadiwkey LOADIWKEY xmm1, xmm2 Legacy KEYLOCKER Loads the Key Locker internal wrapping key.
lods LODSB Legacy Base Loads byte/word/dword from [ESI] into AL/AX/EAX.
lodsd LODSD Legacy Base Loads doubleword from [ESI] into EAX.
lodsq LODSQ Legacy Base (64-bit) Loads quadword from [RSI] into RAX.
lodsw LODSW Legacy Base Loads word from [ESI] into AX.
loop LOOP rel Legacy Base Decrements ECX/RCX and jumps if not zero.
loope LOOPE rel Legacy Base Decrements count; jumps if count!=0 and ZF=1.
loopne LOOPNE rel Legacy Base Decrements count; jumps if count!=0 and ZF=0.
lsl LSL r, r/m16 System System Reads segment limit from descriptor.
lss LSS r, m Legacy Base Loads pointer into SS and register.
ltr LTR r/m16 System System Loads Task Register (Privileged).
lzcnt LZCNT r, r/m VEX ABM/BMI Counts number of leading zeros.
maskmovdqu MASKMOVDQU xmm, xmm SSE2 SSE2 Non-temporal store of selected bytes (masked).
maskmovq MASKMOVQ mm1, mm2 MMX MMX Non-temporal store of selected MMX bytes.
maxps MAXPS xmm, xmm/m128 SSE SSE Returns maximum of packed floats.
maxsd MAXSD xmm1, xmm2/m64 SSE2 SSE2 Returns the maximum of two low double-precision values.
maxss MAXSS xmm1, xmm2/m32 SSE SSE Returns the maximum of two low single-precision values.
mfence MFENCE SSE2 SSE2 Serializes all load and store operations.
minps MINPS xmm, xmm/m128 SSE SSE Returns minimum of packed floats.
minsd MINSD xmm1, xmm2/m64 SSE2 SSE2 Returns the minimum of two low double-precision values.
minss MINSS xmm1, xmm2/m32 SSE SSE Returns the minimum of two low single-precision values.
monitor MONITOR Legacy SSE3 Sets up a linear address range to be monitored.
monitorx MONITORX AMD AMD Sets up a monitor address (AMD extension).
mov MOV r/m, r Legacy Base Copies data from source to destination.
mov cr MOV CRn, r System System Moves data to/from Control Registers (CR0, CR3, etc.) (Privileged).
mov dr MOV DRn, r System System Moves data to/from Debug Registers (DR0-DR7) (Privileged).
movapd MOVAPD xmm, xmm/m128 SSE2 SSE2 Moves 128-bit packed double data (Must be 16-byte aligned).
movaps MOVAPS xmm, xmm/m128 SSE SSE Moves 128-bit packed float data (Must be 16-byte aligned).
movbe MOVBE r, m Legacy MOVBE Moves data swapping bytes (Big Endian load/store).
movd MOVD mm/xmm, r32/m32 SSE MMX/SSE2 Moves 32 bits between GPR and XMM/MMX register.
movddup MOVDDUP xmm1, xmm2/m64 SSE3 SSE3 Loads 64-bit double and duplicates it to fill 128-bit register.
movdir64b MOVDIR64B m512, m512 Legacy MOVDIR64B Atomically moves 64-byte block avoiding cache pollution.
movdiri MOVDIRI m, r Legacy MOVDIRI Moves 32/64-bit data avoiding cache pollution (Direct IO).
movdqa MOVDQA xmm, xmm/m128 SSE2 SSE2 Moves 128-bit integer data (Aligned).
movdqu MOVDQU xmm, xmm/m128 SSE2 SSE2 Moves 128-bit integer data (Unaligned).
movmskpd MOVMSKPD r32, xmm SSE2 SSE2 Extracts sign bits from two doubles into low 2 bits of register.
movmskps MOVMSKPS r32, xmm SSE SSE Extracts sign bits from four floats into low 4 bits of register.
movntdqa MOVNTDQA xmm1, m128 SSE4.1 SSE4.1 Efficiently loads 128-bits from WC memory (Streaming Load).
movnti MOVNTI m32, r32 SSE2 SSE2 Stores integer register to memory bypassing cache.
movntpd MOVNTPD m128, xmm SSE2 SSE2 Stores double vectors directly to RAM, bypassing cache.
movntps MOVNTPS m128, xmm SSE SSE Stores float vectors directly to RAM, bypassing cache.
movntq MOVNTQ m64, mm SSE SSE Stores 64-bit MMX data bypassing cache.
movntsd MOVNTSD m64, xmm1 SSE4a SSE4a Stores scalar double bypassing cache (AMD SSE4a).
movntss MOVNTSS m32, xmm1 SSE4a SSE4a Stores scalar float bypassing cache (AMD SSE4a).
movq MOVQ mm, mm/m64 MMX MMX Moves 64-bit data between MMX registers/memory.
movq MOVQ xmm, xmm/m64 SSE2 SSE2 Moves 64 bits between XMM registers or memory.
movsd MOVSD xmm1, xmm2/m64 SSE2 SSE2 Moves a single double (low 64 bits) between XMM/Memory.
movsd MOVSD Legacy Base Moves doubleword from [ESI] to [EDI].
movshdup MOVSHDUP xmm1, xmm2/m128 SSE3 SSE3 Duplicates high element of each qword pair.
movsldup MOVSLDUP xmm1, xmm2/m128 SSE3 SSE3 Duplicates low element of each qword pair.
movsq MOVSQ Legacy Base (64-bit) Moves quadword from [RSI] to [RDI].
movss MOVSS xmm1, xmm2/m32 SSE SSE Moves a single float (low 32 bits) between XMM/Memory.
movsw MOVSW Legacy Base Moves word from [ESI] to [EDI].
movsx MOVSX r, r/m Legacy Base Copies and sign-extends a smaller value to a larger register.
movsxd MOVSXD r64, r/m32 Base (64-bit) Base (64-bit) Sign-extends 32-bit register to 64-bit.
movupd MOVUPD xmm, xmm/m128 SSE2 SSE2 Moves 128-bit packed double data (Unaligned).
movups MOVUPS xmm, xmm/m128 SSE SSE Moves 128-bit packed float data (Unaligned).
movzx MOVZX r, r/m Legacy Base Copies and zero-extends a smaller value to a larger register.
mpsadbw MPSADBW xmm1, xmm2/m128, imm8 SSE4.1 SSE4.1 Computes multiple SADs of byte blocks.
mul MUL r/m Legacy Base Unsigned multiply (AX = AL * src).
mulpd MULPD xmm, xmm/m128 SSE2 SSE2 Multiplies two 64-bit doubles.
mulps MULPS xmm, xmm/m128 SSE SSE Multiplies four 32-bit floats.
mulsd MULSD xmm1, xmm2/m64 SSE2 SSE2 Multiplies the low double-precision floating-point value.
mulss MULSS xmm1, xmm2/m32 SSE SSE Multiplies the low single-precision floating-point value.
mulx MULX r32, r32, r/m32 VEX BMI2 Unsigned multiply of RDX * Src. Result in Hi:Lo. No flags.
mwait MWAIT Legacy SSE3 Waits for a write to a monitored address.
mwaitx MWAITX AMD AMD Waits for a write to monitored address (AMD extension).
neg NEG r/m Legacy Base Negates value (0 - operand).
nop NOP Legacy Base Does nothing (alias for XCHG EAX, EAX).
not NOT r/m Legacy Base Reverses bits of operand.
or OR r/m, r Legacy Base Performs bitwise OR.
orps ORPS xmm, xmm/m128 SSE SSE Bitwise OR of 128 bits.
out OUT imm8, AL Legacy Base Writes data from AL/AX/EAX to an I/O port.
out OUT DX, AL/AX/EAX Legacy Base Writes data to I/O port specified in DX.
outs OUTSB Legacy Base Writes string from memory at [ESI] to I/O port.
outsd OUTSD Legacy Base Writes doubleword from memory at [ESI] to I/O port.
outsw OUTSW Legacy Base Writes word from memory at [ESI] to I/O port.
pabsb PABSB xmm1, xmm2/m128 SSSE3 SSSE3 Computes absolute value of bytes.
packssdw PACKSSDW xmm, xmm/m128 SSE2 SSE2 Converts doublewords to words with saturation.
packsswb PACKSSWB xmm, xmm/m128 SSE2 SSE2 Converts words to bytes with saturation.
packusdw PACKUSDW xmm1, xmm2/m128 SSE4.1 SSE4.1 Converts signed dwords to unsigned words with saturation.
packuswb PACKUSWB xmm1, xmm2/m128 SSE2 SSE2 Converts signed words to unsigned bytes with saturation.
paddb PADDB xmm, xmm/m128 SSE2 SSE2 Adds 16 bytes (Wraparound).
paddd PADDD xmm, xmm/m128 SSE2 SSE2 Adds 4 doublewords (Wraparound).
paddq PADDQ xmm, xmm/m128 SSE2 SSE2 Adds 2 quadwords (Wraparound).
paddsb PADDSB mm, mm/m64 MMX MMX Adds 8 signed bytes with saturation (MMX).
paddsb PADDSB xmm, xmm/m128 SSE2 SSE2 Adds 16 signed bytes with saturation.
paddsw PADDSW mm, mm/m64 MMX MMX Adds 4 signed words with saturation (MMX).
paddsw PADDSW xmm1, xmm2/m128 SSE2 SSE2 Adds 16-bit words with signed saturation.
paddusb PADDUSB mm, mm/m64 MMX MMX Adds 8 unsigned bytes with saturation (MMX).
paddusb PADDUSB xmm, xmm/m128 SSE2 SSE2 Adds 16 unsigned bytes with saturation.