AMDGPU / GFX Instructions GPU Native ISA AMD
2442 instructions - showing 100 per page, page 18 of 25 - AMDGPU/GFX is AMD's native, low-level
GPU instruction set family, assembled directly with no virtual intermediate layer. Supported
instructions and their exact encodings vary by GFX compatibility target (e.g.
gfx942, gfx1100). Scalar instructions execute once per wavefront on
the Scalar ALU; vector instructions execute per-lane on the Vector ALU, gated by the EXEC mask.
| Mnemonic | Syntax | Format | GFX Targets | Unit | Summary |
|---|---|---|---|---|---|
| v_cvt_scale_pk8_f16_fp4 | v_cvt_scale_pk8_f16_fp4 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scale_pk8_f16_fp8 | v_cvt_scale_pk8_f16_fp8 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scale_pk8_f32_bf8 | v_cvt_scale_pk8_f32_bf8 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scale_pk8_f32_fp4 | v_cvt_scale_pk8_f32_fp4 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scale_pk8_f32_fp8 | v_cvt_scale_pk8_f32_fp8 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_2xpk16_bf6_f32 | v_cvt_scalef32_2xpk16_bf6_f32 | VOP3 | Scale packed 16-component single-precision float vectors from two source inputs using the exponent provided by the third single-precision float… | ||
| v_cvt_scalef32_2xpk16_fp6_f32 | v_cvt_scalef32_2xpk16_fp6_f32 | VOP3 | Scale packed 16-component single-precision float vectors from two source inputs using the exponent provided by the third single-precision float… | ||
| v_cvt_scalef32_f16_bf8 | v_cvt_scalef32_f16_bf8 | VOP3 | Convert from a BF8 float input to a half-precision float value, then scale the value using the exponent provided by the second single-precision float… | ||
| v_cvt_scalef32_f16_fp8 | v_cvt_scalef32_f16_fp8 | VOP3 | Convert from an FP8 float input to a half-precision float value, then scale the value using the exponent provided by the second single-precision… | ||
| v_cvt_scalef32_f32_bf8 | v_cvt_scalef32_f32_bf8 | VOP3 | Convert from a BF8 float input to a single-precision float value, then scale the value using the exponent provided by the second single-precision… | ||
| v_cvt_scalef32_f32_fp8 | v_cvt_scalef32_f32_fp8 | VOP3 | Convert from an FP8 float input to a single-precision float value, then scale the value using the exponent provided by the second single-precision… | ||
| v_cvt_scalef32_pk16_bf6_bf16 | v_cvt_scalef32_pk16_bf6_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk16_bf6_f16 | v_cvt_scalef32_pk16_bf6_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk16_bf6_f32 | v_cvt_scalef32_pk16_bf6_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk16_fp6_bf16 | v_cvt_scalef32_pk16_fp6_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk16_fp6_f16 | v_cvt_scalef32_pk16_fp6_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk16_fp6_f32 | v_cvt_scalef32_pk16_fp6_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk32_bf16_bf6 | v_cvt_scalef32_pk32_bf16_bf6 | VOP3 | Convert from a packed 32-component BF6 float input to a packed BF16 float value, then scale the packed values using the exponent provided by the… | ||
| v_cvt_scalef32_pk32_bf16_fp6 | v_cvt_scalef32_pk32_bf16_fp6 | VOP3 | Convert from a packed 32-component FP6 float input to a packed BF16 float value, then scale the packed values using the exponent provided by the… | ||
| v_cvt_scalef32_pk32_bf6_bf16 | v_cvt_scalef32_pk32_bf6_bf16 | VOP3 | Scale a packed 32-component BF16 float input using the exponent provided by the second single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_pk32_bf6_f16 | v_cvt_scalef32_pk32_bf6_f16 | VOP3 | Scale a packed 32-component half-precision float input using the exponent provided by the second single-precision float input, then convert the… | ||
| v_cvt_scalef32_pk32_bf6_f32 | v_cvt_scalef32_pk32_bf6_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk32_f16_bf6 | v_cvt_scalef32_pk32_f16_bf6 | VOP3 | Convert from a packed 32-component BF6 float input to a packed half-precision float value, then scale the packed values using the exponent provided… | ||
| v_cvt_scalef32_pk32_f16_fp6 | v_cvt_scalef32_pk32_f16_fp6 | VOP3 | Convert from a packed 32-component FP6 float input to a packed half-precision float value, then scale the packed values using the exponent provided… | ||
| v_cvt_scalef32_pk32_f32_bf6 | v_cvt_scalef32_pk32_f32_bf6 | VOP3 | Convert from a packed 32-component BF6 float input to a packed single-precision float value, then scale the packed values using the exponent provided… | ||
| v_cvt_scalef32_pk32_f32_fp6 | v_cvt_scalef32_pk32_f32_fp6 | VOP3 | Convert from a packed 32-component FP6 float input to a packed single-precision float value, then scale the packed values using the exponent provided… | ||
| v_cvt_scalef32_pk32_fp6_bf16 | v_cvt_scalef32_pk32_fp6_bf16 | VOP3 | Scale a packed 32-component BF16 float input using the exponent provided by the second single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_pk32_fp6_f16 | v_cvt_scalef32_pk32_fp6_f16 | VOP3 | Scale a packed 32-component half-precision float input using the exponent provided by the second single-precision float input, then convert the… | ||
| v_cvt_scalef32_pk32_fp6_f32 | v_cvt_scalef32_pk32_fp6_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_bf8_bf16 | v_cvt_scalef32_pk8_bf8_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_bf8_f16 | v_cvt_scalef32_pk8_bf8_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_bf8_f32 | v_cvt_scalef32_pk8_bf8_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_fp4_bf16 | v_cvt_scalef32_pk8_fp4_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_fp4_f16 | v_cvt_scalef32_pk8_fp4_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_fp4_f32 | v_cvt_scalef32_pk8_fp4_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_fp8_bf16 | v_cvt_scalef32_pk8_fp8_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_fp8_f16 | v_cvt_scalef32_pk8_fp8_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk8_fp8_f32 | v_cvt_scalef32_pk8_fp8_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_pk_bf16_bf8 | v_cvt_scalef32_pk_bf16_bf8 | VOP3 | Convert from a packed 2-component BF8 float input to a packed BF16 float value, then scale the packed values using the exponent provided by the… | ||
| v_cvt_scalef32_pk_bf16_fp4 | v_cvt_scalef32_pk_bf16_fp4 | VOP3 | Convert from a packed 2-component FP4 float input to a packed BF16 float value, then scale the packed values using the exponent provided by the… | ||
| v_cvt_scalef32_pk_bf16_fp8 | v_cvt_scalef32_pk_bf16_fp8 | VOP3 | Convert from a packed 2-component FP8 float input to a packed BF16 float value, then scale the packed values using the exponent provided by the… | ||
| v_cvt_scalef32_pk_bf8_bf16 | v_cvt_scalef32_pk_bf8_bf16 | VOP3 | Scale a packed 2-component BF16 float input using the exponent provided by the second single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_pk_bf8_f16 | v_cvt_scalef32_pk_bf8_f16 | VOP3 | Scale a packed 2-component half-precision float input using the exponent provided by the second single-precision float input, then convert the values… | ||
| v_cvt_scalef32_pk_bf8_f32 | v_cvt_scalef32_pk_bf8_f32 | VOP3 | Scale two single-precision float inputs using the exponent provided by the third single-precision float input, then convert the values to a packed… | ||
| v_cvt_scalef32_pk_f16_bf8 | v_cvt_scalef32_pk_f16_bf8 | VOP3 | Convert from a packed 2-component BF8 float input to a packed half-precision float value, then scale the packed values using the exponent provided by… | ||
| v_cvt_scalef32_pk_f16_fp4 | v_cvt_scalef32_pk_f16_fp4 | VOP3 | Convert from a packed 2-component FP4 float input to a packed half-precision float value, then scale the packed values using the exponent provided by… | ||
| v_cvt_scalef32_pk_f16_fp8 | v_cvt_scalef32_pk_f16_fp8 | VOP3 | Convert from a packed 2-component FP8 float input to a packed half-precision float value, then scale the packed values using the exponent provided by… | ||
| v_cvt_scalef32_pk_f32_bf8 | v_cvt_scalef32_pk_f32_bf8 | VOP3 | Convert from a packed 2-component BF8 float input to a packed single-precision float value, then scale the packed values using the exponent provided… | ||
| v_cvt_scalef32_pk_f32_fp4 | v_cvt_scalef32_pk_f32_fp4 | VOP3 | Convert from a packed 2-component FP4 float input to a packed single-precision float value, then scale the packed values using the exponent provided… | ||
| v_cvt_scalef32_pk_f32_fp8 | v_cvt_scalef32_pk_f32_fp8 | VOP3 | Convert from a packed 2-component FP8 float input to a packed single-precision float value, then scale the packed values using the exponent provided… | ||
| v_cvt_scalef32_pk_fp4_bf16 | v_cvt_scalef32_pk_fp4_bf16 | VOP3 | Scale a packed 2-component BF16 float input using the exponent provided by the second single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_pk_fp4_f16 | v_cvt_scalef32_pk_fp4_f16 | VOP3 | Scale a packed 2-component half-precision float input using the exponent provided by the second single-precision float input, then convert the values… | ||
| v_cvt_scalef32_pk_fp4_f32 | v_cvt_scalef32_pk_fp4_f32 | VOP3 | Scale two single-precision float inputs using the exponent provided by the third single-precision float input, then convert the values to a packed… | ||
| v_cvt_scalef32_pk_fp8_bf16 | v_cvt_scalef32_pk_fp8_bf16 | VOP3 | Scale a packed 2-component BF16 float input using the exponent provided by the second single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_pk_fp8_f16 | v_cvt_scalef32_pk_fp8_f16 | VOP3 | Scale a packed 2-component half-precision float input using the exponent provided by the second single-precision float input, then convert the values… | ||
| v_cvt_scalef32_pk_fp8_f32 | v_cvt_scalef32_pk_fp8_f32 | VOP3 | Scale two single-precision float inputs using the exponent provided by the third single-precision float input, then convert the values to a packed… | ||
| v_cvt_scalef32_sr_bf8_bf16 | v_cvt_scalef32_sr_bf8_bf16 | VOP3 | Scale a BF16 float input using the exponent provided by the third single-precision float input, then convert the values to a BF8 float value with… | ||
| v_cvt_scalef32_sr_bf8_f16 | v_cvt_scalef32_sr_bf8_f16 | VOP3 | Scale a half-precision float input using the exponent provided by the third single-precision float input, then convert the values to a BF8 float… | ||
| v_cvt_scalef32_sr_bf8_f32 | v_cvt_scalef32_sr_bf8_f32 | VOP3 | Scale a single-precision float input using the exponent provided by the third single-precision float input, then convert the values to a BF8 float… | ||
| v_cvt_scalef32_sr_fp8_bf16 | v_cvt_scalef32_sr_fp8_bf16 | VOP3 | Scale a BF16 float input using the exponent provided by the third single-precision float input, then convert the values to an FP8 float value with… | ||
| v_cvt_scalef32_sr_fp8_f16 | v_cvt_scalef32_sr_fp8_f16 | VOP3 | Scale a half-precision float input using the exponent provided by the third single-precision float input, then convert the values to an FP8 float… | ||
| v_cvt_scalef32_sr_fp8_f32 | v_cvt_scalef32_sr_fp8_f32 | VOP3 | Scale a single-precision float input using the exponent provided by the third single-precision float input, then convert the values to an FP8 float… | ||
| v_cvt_scalef32_sr_pk16_bf6_bf16 | v_cvt_scalef32_sr_pk16_bf6_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk16_bf6_f16 | v_cvt_scalef32_sr_pk16_bf6_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk16_bf6_f32 | v_cvt_scalef32_sr_pk16_bf6_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk16_fp6_bf16 | v_cvt_scalef32_sr_pk16_fp6_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk16_fp6_f16 | v_cvt_scalef32_sr_pk16_fp6_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk16_fp6_f32 | v_cvt_scalef32_sr_pk16_fp6_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk32_bf6_bf16 | v_cvt_scalef32_sr_pk32_bf6_bf16 | VOP3 | Scale a packed 32-component BF16 float input using the exponent provided by the third single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_sr_pk32_bf6_f16 | v_cvt_scalef32_sr_pk32_bf6_f16 | VOP3 | Scale a packed 32-component half-precision float input using the exponent provided by the third single-precision float input, then convert the values… | ||
| v_cvt_scalef32_sr_pk32_bf6_f32 | v_cvt_scalef32_sr_pk32_bf6_f32 | VOP3 | Scale a packed 32-component single-precision float input using the exponent provided by the third single-precision float input, then convert the… | ||
| v_cvt_scalef32_sr_pk32_fp6_bf16 | v_cvt_scalef32_sr_pk32_fp6_bf16 | VOP3 | Scale a packed 32-component BF16 float input using the exponent provided by the third single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_sr_pk32_fp6_f16 | v_cvt_scalef32_sr_pk32_fp6_f16 | VOP3 | Scale a packed 32-component half-precision float input using the exponent provided by the third single-precision float input, then convert the values… | ||
| v_cvt_scalef32_sr_pk32_fp6_f32 | v_cvt_scalef32_sr_pk32_fp6_f32 | VOP3 | Scale a packed 32-component single-precision float input using the exponent provided by the third single-precision float input, then convert the… | ||
| v_cvt_scalef32_sr_pk8_bf8_bf16 | v_cvt_scalef32_sr_pk8_bf8_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_bf8_f16 | v_cvt_scalef32_sr_pk8_bf8_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_bf8_f32 | v_cvt_scalef32_sr_pk8_bf8_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_fp4_bf16 | v_cvt_scalef32_sr_pk8_fp4_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_fp4_f16 | v_cvt_scalef32_sr_pk8_fp4_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_fp4_f32 | v_cvt_scalef32_sr_pk8_fp4_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_fp8_bf16 | v_cvt_scalef32_sr_pk8_fp8_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_fp8_f16 | v_cvt_scalef32_sr_pk8_fp8_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk8_fp8_f32 | v_cvt_scalef32_sr_pk8_fp8_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_scalef32_sr_pk_fp4_bf16 | v_cvt_scalef32_sr_pk_fp4_bf16 | VOP3 | Scale a packed 2-component BF16 float input using the exponent provided by the third single-precision float input, then convert the values to a… | ||
| v_cvt_scalef32_sr_pk_fp4_f16 | v_cvt_scalef32_sr_pk_fp4_f16 | VOP3 | Scale a packed 2-component half-precision float input using the exponent provided by the third single-precision float input, then convert the values… | ||
| v_cvt_scalef32_sr_pk_fp4_f32 | v_cvt_scalef32_sr_pk_fp4_f32 | VOP3 | Scale a packed 2-component single-precision float input using the exponent provided by the third single-precision float input, then convert the… | ||
| v_cvt_sr_bf16_f32 | v_cvt_sr_bf16_f32 | VOP3 | Convert from a single-precision float input to a BF16 value with stochastic rounding using seed data from the second input. | ||
| v_cvt_sr_bf8_f16 | v_cvt_sr_bf8_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_sr_bf8_f32 | v_cvt_sr_bf8_f32 | VOP3 | Convert from a single-precision float input to a BF8 value with stochastic rounding using seed data from the second input. | ||
| v_cvt_sr_bf8_f32_gfx12 | v_cvt_sr_bf8_f32_gfx12 | VOP3 | gfx1100 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | |
| v_cvt_sr_f16_f32 | v_cvt_sr_f16_f32 | VOP3 | Convert from a single-precision float input to a half-precision value with stochastic rounding using seed data from the second input. | ||
| v_cvt_sr_fp8_f16 | v_cvt_sr_fp8_f16 | VOP3 | AMDGPU VOP3 vector instruction operating on f16 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_sr_fp8_f32 | v_cvt_sr_fp8_f32 | VOP3 | Convert from a single-precision float input to an FP8 value with stochastic rounding using seed data from the second input. | ||
| v_cvt_sr_fp8_f32_gfx12 | v_cvt_sr_fp8_f32_gfx12 | VOP3 | gfx1100 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | |
| v_cvt_sr_fp8_f32_gfx1250 | v_cvt_sr_fp8_f32_gfx1250 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_sr_pk_bf16_f32 | v_cvt_sr_pk_bf16_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_sr_pk_f16_f32 | v_cvt_sr_pk_f16_f32 | VOP3 | AMDGPU VOP3 vector instruction operating on f16/f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| v_cvt_u16_f16 | v_cvt_u16_f16 | VOP1 | gfx1100 | Convert from a half-precision float input to an unsigned 16-bit integer value and store the result into a vector register. | |
| v_cvt_u32_f32 | v_cvt_u32_f32 | VOP1 | gfx1100 | Convert from a single-precision float input to an unsigned 32-bit integer value and store the result into a vector register. | |
| v_cvt_u32_f64 | v_cvt_u32_f64 | VOP1 | gfx1100 | Convert from a double-precision float input to an unsigned 32-bit integer value and store the result into a vector register. |
Source
Normalized from AMD's official ROCm documentation, with the LLVM AMDGPU backend documentation as supplementary compiler-target information. ROCm documentation ↗