global_atomic_and GPU Native ISA AMD Vector

GLOBAL ATOMIC AND Vector/Global Memory

global_atomic_and

Calculate bitwise AND given two unsigned 32-bit integer values stored in the data register and a location in the global aperture.

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (GLOBAL) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format GLOBAL
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

More in Vector/Global Memory

Reference

AMDGPU / GFX ISA

Description

Calculate bitwise AND given two unsigned 32-bit integer values stored in the data register and a location in the global aperture. Store the original value from global aperture into a vector register iff the SC0 bit is set.

Semantics

addr = CalcGlobalAddr(ADDR.b32, SADDR.b32, OFFSET.b32); tmp = MEM[addr].b32; MEM[addr].b32 = (tmp & DATA.b32); RETURN_DATA.b32 = tmp

Example

global_atomic_and v1, v2, vcc

A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.

Sources