Base (Atomic) Instructions

19 ARM instructions in this extension - click any row for encoding, pseudocode, and full documentation.

Mnemonic ⇅	Syntax	Format ⇅	Summary
clrex	CLREX {#<imm>}	System	Clears the local monitor state (AArch64 variant).
ldar	LDAR <Wt>, [<Xn\|SP>]	Load/Store	Loads a word with Acquire semantics.
ldarb	LDARB <Wt>, [<Xn\|SP>]	Load/Store	Loads a byte with Acquire semantics.
ldarh	LDARH <Wt>, [<Xn\|SP>]	Load/Store	Loads a halfword with Acquire semantics.
ldaxr	LDAXR <Wt>, [<Xn\|SP>]	Load/Store Excl	Loads a word with Acquire Exclusive semantics.
ldaxrb	LDAXRB <Wt>, [<Xn\|SP>]	Load/Store Excl	Loads a byte with Acquire Exclusive semantics.
ldaxrh	LDAXRH <Wt>, [<Xn\|SP>]	Load/Store Excl	Loads a halfword with Acquire Exclusive semantics.
ldxp	LDXP <Wt1>, <Wt2>, [<Xn\|SP>]	Load/Store Excl	Loads two words as an exclusive operation.
ldxr	LDXR <Wt>, [<Xn\|SP>]	Load/Store Excl	Loads a word and marks physical address as exclusive access.
stlr	STLR <Wt>, [<Xn\|SP>]	Load/Store	Stores a word with Release semantics.
stlrb	STLRB <Wt>, [<Xn\|SP>]	Load/Store	Stores a byte with Release semantics.
stlrh	STLRH <Wt>, [<Xn\|SP>]	Load/Store	Stores a halfword with Release semantics.
stlxr	STLXR <Ws>, <Wt>, [<Xn\|SP>]	Load/Store Excl	Stores a word with Release Exclusive semantics.
stlxrb	STLXRB <Ws>, <Wt>, [<Xn\|SP>]	Load/Store Excl	Stores a byte with Release Exclusive semantics.
stlxrh	STLXRH <Ws>, <Wt>, [<Xn\|SP>]	Load/Store Excl	Stores a halfword with Release Exclusive semantics.
stxp	STXP <Ws>, <Wt1>, <Wt2>, [<Xn\|SP>]	Load/Store Excl	Stores two registers if exclusive monitor matches.
stxr	STXR <Ws>, <Wt>, [<Xn\|SP>]	Load/Store Excl	Stores a word if exclusive monitor matches.
stxrb	STXRB <Ws>, <Wt>, [<Xn\|SP>]	Load/Store Excl	Stores a byte if exclusive monitor matches.
stxrh	STXRH <Ws>, <Wt>, [<Xn\|SP>]	Load/Store Excl	Stores a halfword if exclusive monitor matches.