brev GPU Virtual ISA NVIDIA

brev Integer Arithmetic Instructions

brev.type d, a;

Perform bitwise reversal of input.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 2.0
Minimum Target sm_20

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
brev.type d, a; sm_20 Perform bitwise reversal of input.

Operands

  • d
    Destination register
  • a
    Source operand

At a Glance

Data Types -

Related AMDGPU Concepts

Bit Reverse ↗
equivalent with restrictions
v_bfrev_b32 (AMDGPU)
s_brev_b32 (AMDGPU)

Related

More in Integer Arithmetic Instructions

Reference

NVIDIA PTX ISA

Semantics

msb = (.type==.b32) ? 31 : 63; for (i=0; i<=msb; i++) { d[i] = a[msb-i]; }

Examples

brev.b32  d, a;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources