clmad GPU Virtual ISA NVIDIA

clmad Integer Arithmetic Instructions

clmad.mode.u64 d, a, b, c;

Performs a carryless multiplication of a and b, followed by a carryless addition of c, and writes the result into destination register d.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 9.3
Minimum Target sm_80

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
clmad.mode.u64 d, a, b, c; sm_80 Performs a carryless multiplication of a and b, followed by a carryless addition of c, and writes the result into destination register d. All operands of clmad are unsigned 64-bit values. (see the official PTX ISA docs for the full description)

Operands

  • d
    Destination register
  • a
    Source operand
  • b
    Source operand
  • c
    Source operand

At a Glance

Data Types -

Related

More in Integer Arithmetic Instructions

Reference

NVIDIA PTX ISA

Description

Performs a carryless multiplication of a and b, followed by a carryless addition of c, and writes the result into destination register d. All operands of clmad are unsigned 64-bit values. The modifier.mode specifies which part of the carryless product is stored in the destination register:.lo Produces lower 64 bits of the product, with addition of c..hi Produces higher 64 bits of the product, with addition of c.

Semantics

tmp[127:0] = 0; // 128-bit result of carryless multiplication. for (i = 0; i < 64; i++) { if ((a & (1 << i)) != 0) { tmp ^= b << i; } } // Select upper or lower 64 bits depending on the value of .mode. if (.mode == .lo) { d = tmp[63..0]; } else { d = tmp[127..64]; } d ^= c; // carryless accumulation.

Examples

.reg .u64 Rd, Ra, Rb, Rc;

// Carryless multiply-add producing lower 64 bits of result.
clmad.lo.u64 Rd, Ra, Rb, Rc;

// Carryless multiply-add producing higher 64 bits of result.
// (truncated - see the official PTX ISA docs for the full example)

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources