bmsk GPU Virtual ISA NVIDIA

bmsk Integer Arithmetic Instructions

bmsk.mode.b32 d, a, b;

Generates a 32-bit mask starting from the bit position specified in operand a, and of the width specified in operand b.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 7.6
Minimum Target sm_70

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
bmsk.mode.b32 d, a, b; sm_70 Generates a 32-bit mask starting from the bit position specified in operand a, and of the width specified in operand b. (see the official PTX ISA docs for the full description)

Operands

  • d
    Destination register
  • a
    Source operand
  • b
    Source operand

At a Glance

Data Types -

Related

More in Integer Arithmetic Instructions

Reference

NVIDIA PTX ISA

Description

Generates a 32-bit mask starting from the bit position specified in operand a, and of the width specified in operand b. The generated bitmask is stored in the destination operand d. The resulting bitmask is 0 in the following cases: When the value of a is 32 or higher and.mode is.clamp. When either the specified value of b or the wrapped value of b (when.mode is specified as.wrap ) is 0.

Semantics

a1 = a & 0x1f; mask0 = (~0) << a1; b1 = b & 0x1f; sum = a1 + b1; mask1 = (~0) << sum; sum-overflow = sum >= 32 ? true : false; bit-position-overflow = false; bit-width-overflow = false; if (.mode == .clamp) { if (a >= 32) { bit-position-overflow = true; mask0 = 0; } if (b >= 32) { bit-width-overflow = true; } } if (sum-overflow || bit-position-overflow || bit-width-overflow) { mask1 = 0; } else if (b1 == 0) { mask1 = ~0; } d = mask0 & ~mask1;

Examples

bmsk.clamp.b32  rd, ra, rb;
bmsk.wrap.b32   rd, 1, 2; // Creates a bitmask of 0x00000006.

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources