s_setvskip GPU Native ISA AMD Scalar

S SETVSKIP Comparison

s_setvskip

Enables or disables VSKIP mode.

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (SOPC) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format SOPC
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

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Reference

AMDGPU / GFX ISA

Description

Enables or disables VSKIP mode. When VSKIP is enabled, no VOP*/M*BUF/MIMG/DS/FLAT instructions are issued. Note that VSKIPped memory instructions do not manipulate the waitcnt counters; as a result, if there are outstanding memory requests the shader may want to issue S_WAITCNT 0 prior to enabling VSKIP, otherwise the shader must be careful not to count VSKIPped instructions in waitcnt calculations.

Semantics

VSKIP = S0.u32[S1.u32[4 : 0]]

Example

s_setvskip 1, 0     // Enable vskip mode.
s_setvskip 0, 0     // Disable vskip mode.

Reproduced from AMD's official "AMD Instinct MI300" ISA Reference Guide for technical accuracy.

Sources