image_bvh_dual_intersect_ray GPU Native ISA AMD Vector
IMAGE BVH DUAL INTERSECT RAY Image / Texture Memory
image_bvh_dual_intersect_ray
This instruction supports testing two QBVH nodes against the same ray per lane using both intersection engines.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (MIMG)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Image / Texture Memory
Reference
AMDGPU / GFX ISA
Description
This instruction supports testing two QBVH nodes against the same ray per lane using both intersection engines. It is typically used to implement the BVH4x2 traversal algorithm.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
- AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.