global_store_short_d16_hi GPU Native ISA AMD Vector
GLOBAL STORE SHORT D16 HI Vector/Global Memory
global_store_short_d16_hi
Store 16 bits of data from the high 16 bits of a 32-bit vector register into the global aperture.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (GLOBAL)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Vector/Global Memory
Reference
AMDGPU / GFX ISA
Semantics
addr = CalcGlobalAddr(ADDR.b32, SADDR.b32, OFFSET.b32);
MEM[addr].b16 = VDATA[31 : 16]
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 505.