global_load_tr_b128 GPU Native ISA AMD Vector
GLOBAL LOAD TR B128 Vector/Global Memory
global_load_tr_b128
Load a 16x16 matrix of 16-bit data from the global aperture, transpose data between row-major and column-major order, and store the result into a…
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (GLOBAL)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Vector/Global Memory
Reference
AMDGPU / GFX ISA
Description
Load a 16x16 matrix of 16-bit data from the global aperture, transpose data between row-major and column-major order, and store the result into a 128-bit vector register.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
- AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.