LDS / Data Share Instructions
230 AMDGPU instructions in this category - showing 30 per page, page 3 of 3 - click any row for encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Summary |
|---|---|---|---|
| ds_sub_u64 | ds_sub_u64 | DS | Subtract an unsigned 64-bit integer value stored in the data register from a value stored in a location in a data share. |
| ds_swizzle_b32 | ds_swizzle_b32 | DS | Dword swizzle, no data is written to LDS memory. |
| ds_wrap_rtn_b32 | ds_wrap_rtn_b32 | DS | Given a minuend from a location in data share and a subtrahend from a vector register, subtract the two values iff the result is nonnegative… |
| ds_write2_b32 | ds_write2_b32 | DS | Store 32 bits of data from one vector input register and then 32 bits of data from a second vector input register into a data share. |
| ds_write2_b64 | ds_write2_b64 | DS | Store 64 bits of data from one vector input register and then 64 bits of data from a second vector input register into a data share. |
| ds_write2st64_b32 | ds_write2st64_b32 | DS | Store 32 bits of data from one vector input register and then 32 bits of data from a second vector input register into a data share. |
| ds_write2st64_b64 | ds_write2st64_b64 | DS | Store 64 bits of data from one vector input register and then 64 bits of data from a second vector input register into a data share. |
| ds_write_addtid_b32 | ds_write_addtid_b32 | DS | Store 32 bits of data from a vector input register into a data share. |
| ds_write_b128 | ds_write_b128 | DS | Store 128 bits of data from a vector input register into a data share. |
| ds_write_b16 | ds_write_b16 | DS | Store 16 bits of data from a vector register into a data share. |
| ds_write_b16_d16_hi | ds_write_b16_d16_hi | DS | Store 16 bits of data from the high bits of a vector register into a data share. |
| ds_write_b32 | ds_write_b32 ADDR, DATA, offset | DS | Write one 32-bit value per lane to the Local Data Share (LDS). |
| ds_write_b64 | ds_write_b64 | DS | Store 64 bits of data from a vector input register into a data share. |
| ds_write_b8 | ds_write_b8 | DS | Store 8 bits of data from a vector register into a data share. |
| ds_write_b8_d16_hi | ds_write_b8_d16_hi | DS | Store 8 bits of data from the high bits of a vector register into a data share. |
| ds_write_b96 | ds_write_b96 | DS | Store 96 bits of data from a vector input register into a data share. |
| ds_write_src2_b32 | ds_write_src2_b32 | DS | AMDGPU DS vector instruction operating on b32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| ds_write_src2_b64 | ds_write_src2_b64 | DS | AMDGPU DS vector instruction operating on b64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| ds_wrxchg2_rtn_b32 | ds_wrxchg2_rtn_b32 | DS | Swap two unsigned 32-bit integer values in the data registers with two locations in a data share. |
| ds_wrxchg2_rtn_b64 | ds_wrxchg2_rtn_b64 | DS | Swap two unsigned 64-bit integer values in the data registers with two locations in a data share. |
| ds_wrxchg2st64_rtn_b32 | ds_wrxchg2st64_rtn_b32 | DS | Swap two unsigned 32-bit integer values in the data registers with two locations in a data share. |
| ds_wrxchg2st64_rtn_b64 | ds_wrxchg2st64_rtn_b64 | DS | Swap two unsigned 64-bit integer values in the data registers with two locations in a data share. |
| ds_wrxchg_rtn_b32 | ds_wrxchg_rtn_b32 | DS | Swap an unsigned 32-bit integer value in the data register with a location in a data share. |
| ds_wrxchg_rtn_b64 | ds_wrxchg_rtn_b64 | DS | Swap an unsigned 64-bit integer value in the data register with a location in a data share. |
| ds_xor_b32 | ds_xor_b32 | DS | Calculate bitwise XOR given two unsigned 32-bit integer values stored in the data register and a location in a data share. |
| ds_xor_b64 | ds_xor_b64 | DS | Calculate bitwise XOR given two unsigned 64-bit integer values stored in the data register and a location in a data share. |
| ds_xor_rtn_b32 | ds_xor_rtn_b32 | DS | Calculate bitwise XOR given two unsigned 32-bit integer values stored in the data register and a location in a data share. |
| ds_xor_rtn_b64 | ds_xor_rtn_b64 | DS | Calculate bitwise XOR given two unsigned 64-bit integer values stored in the data register and a location in a data share. |
| ds_xor_src2_b32 | ds_xor_src2_b32 | DS | AMDGPU DS vector instruction operating on b32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| ds_xor_src2_b64 | ds_xor_src2_b64 | DS | AMDGPU DS vector instruction operating on b64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |