v_pk_min_num_f16 GPU Native ISA AMD Vector

V PK MIN NUM F16 Vector Packed Arithmetic

v_pk_min_num_f16

Select the component-wise IEEE minimumNumber() of two packed half-precision float inputs and store the selected values into a vector register.

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (VOP3P) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format VOP3P
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Related

More in Vector Packed Arithmetic

Reference

AMDGPU / GFX ISA

Sources