flat_atomic_max_f64 GPU Native ISA AMD Vector
FLAT ATOMIC MAX F64 Flat Memory
flat_atomic_max_f64
Select the maximum of two double-precision float inputs, given two values stored in the data register and a location in the flat aperture.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (FLAT)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx942 | ✅ Supported |
Related
More in Flat Memory
Reference
AMDGPU / GFX ISA
Description
Select the maximum of two double-precision float inputs, given two values stored in the data register and a location in the flat aperture. Update the flat aperture with the selected value. Store the original value from flat aperture into a vector register iff the SC0 bit is set.
Semantics
addr = CalcFlatAddr(ADDR.b32, OFFSET.b32);
tmp = MEM[addr].f64;
src = DATA.f64;
MEM[addr].f64 = src > tmp ? src : tmp;
RETURN_DATA.f64 = tmp
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 492.