flat_atomic_dec GPU Native ISA AMD Vector
FLAT ATOMIC DEC Flat Memory
flat_atomic_dec
Decrement an unsigned 32-bit integer value from a location in the flat aperture with wraparound to a value in the data register if the decrement…
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (FLAT)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx1100 | ✅ Supported |
Related
More in Flat Memory
Reference
AMDGPU / GFX ISA
Description
Decrement an unsigned 32-bit integer value from a location in the flat aperture with wraparound to a value in the data register if the decrement yields a negative value. Store the original value from flat aperture into a vector register iff the SC0 bit is set.
Semantics
addr = CalcFlatAddr(ADDR.b32, OFFSET.b32);
tmp = MEM[addr].u32;
src = DATA.u32;
MEM[addr].u32 = ((tmp == 0U) || (tmp > src)) ? src : tmp - 1U;
RETURN_DATA.u32 = tmp
Example
flat_atomic_dec v[1:2], v2A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 490. - LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project