flat_atomic_pk_add_f16 GPU Native ISA AMD Vector
FLAT ATOMIC PK ADD F16 Flat Memory
flat_atomic_pk_add_f16
Add a packed 2-component half-precision float value in the data register to a location in the flat aperture.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (FLAT)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Floating-point addition handles NAN/INF/denorm.
Related
More in Flat Memory
Reference
AMDGPU / GFX ISA
Description
Add a packed 2-component half-precision float value in the data register to a location in the flat aperture. Store the original value from flat aperture into a vector register iff the SC0 bit is set.
Semantics
tmp = MEM[ADDR];
src = DATA;
dst[31 : 16].f16 = tmp[31 : 16].f16 + src[31 : 16].f16;
dst[15 : 0].f16 = tmp[15 : 0].f16 + src[15 : 0].f16;
MEM[ADDR] = dst.b32;
RETURN_DATA = tmp
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 491.