flat_atomic_swap_b32 GPU Native ISA AMD Vector
FLAT ATOMIC SWAP B32 Flat Memory
flat_atomic_swap_b32
Swap an unsigned 32-bit integer value in the data register with a location in the flat aperture.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (FLAT)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx1100 | ✅ Supported |
Related
More in Flat Memory
Reference
AMDGPU / GFX ISA
Description
Swap an unsigned 32-bit integer value in the data register with a location in the flat aperture. Store the original value from flat aperture into a vector register iff the temporal hint enables atomic return.
Example
flat_atomic_swap_b32 v[1:2], v2A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
- AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.
- LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project