rcp GPU Virtual ISA NVIDIA

rcp Floating-Point Instructions

rcp.approx{.ftz}.f32 d, a; // fast, approximate reciprocal

Compute 1/a, store result in d.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.0
Minimum Target sm_20

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
rcp.approx{.ftz}.f32 d, a; // fast, approximate reciprocal sm_20 Compute 1/a, store result in d.

Operands

At a Glance

Data Types -

Related AMDGPU Concepts

Special-Function Approximation ↗
equivalent with restrictions
v_rsq_f32 (AMDGPU)
v_sin_f32 (AMDGPU)
v_sqrt_f32 (AMDGPU)
v_rcp_f32 (AMDGPU)

Related

More in Floating-Point Instructions

Reference

NVIDIA PTX ISA

Semantics

d = 1 / a;

Examples

rcp.approx.ftz.f32  ri,r;
rcp.rn.ftz.f32      xi,x;
rcp.rn.f64          xi,x;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources