v_mfma_f64_4x4x4_4b_f64 GPU Native ISA AMD Matrix

Vector Packed Arithmetic

v_mfma_f64_4x4x4_4b_f64

Multiply the 4x4 matrix in the first input by the 4x4 matrix in the second input and add the 4x4 matrix in the third input using fused multiply add.

Also written as v_mfma_f64_4x4x4f64. AMD's machine-readable ISA specification lists this name for the same instruction.

Encoding

Binary Layout (AMD CDNA 4)
BLGP
63:61
ACC
60:59
SRC2
58:50
SRC1
49:41
SRC0
40:32
110100111
31:23
1101111
22:16
ACC_CD
15
ABID
14:11
CBSZ
10:8
VDST
7:0
 

The VOP3P_MFMA layout from AMD's machine-readable ISA specification (AMD CDNA 4). Opcode 111 in OP rebuilds 0x00000000D3EF0000, an identifier AMD lists for this encoding. The same in AMD CDNA 3.

Format VOP3P
Width 64 bits
Opcode 111
Identifier 0x00000000D3EF0000

Operands

  • VDST
    Written. N/A Data format: N/A (OPR_VGPR_OR_ACCVGPR, FMT_NUM_F64)
  • SRC0
    Read. N/A Data format: N/A (OPR_SRC_VGPR_OR_ACCVGPR, FMT_NUM_F64)
  • SRC1
    Read. N/A Data format: N/A (OPR_SRC_VGPR_OR_ACCVGPR, FMT_NUM_F64)
  • SRC2
    Read. N/A Data format: N/A (OPR_SRC_VGPR_OR_ACCVGPR_OR_CONST, FMT_NUM_F64)

In AMD's order, as its machine-readable ISA specification lists them for the VOP3P_MFMA encoding (AMD CDNA 4).

GFX Target Compatibility

TargetSupport
gfx942✅ Supported

This instruction performs 4 passes.

Related

More in Vector Packed Arithmetic

Reference

AMDGPU / GFX ISA

Description

Multiply the 4x4 matrix in the first input by the 4x4 matrix in the second input and add the 4x4 matrix in the third input using fused multiply add. Store the resulting matrix into vector registers.

Semantics

D = A (4x4) * B (4x4) + C (4x4) This instruction performs 4 matrix multiplies. Each operand contains 4 matrices back to back, and each matrix has elements distributed across all lanes of the wave. Each matrix multiple is computed and the row-column dot products are distributed across the vector ALU for higher performance. The result matrices are stored back-to-back in the destination vector registers. Matrices A and B are double-precision float format. Matrices C and D are double-precision float format.

Sources