selp GPU Virtual ISA NVIDIA

Select with Predicate Comparison & Selection

selp.type d, a, b, p;

Select between two operands based on a predicate, without branching.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding — the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.2
Minimum Target sm_10

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations — each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
selp.type d, a, b, p; b16, b32, b64, s16, s32, s64, u16, u32, u64, f32, f64 sm_10 Branchless select.

Operands

  • d
    Destination register
  • a
    Value if p is true
  • b
    Value if p is false
  • p
    Predicate register

At a Glance

Data Types b16, b32, b64, f32, f64, s16, s32, s64, u16, u32, u64

Reference

NVIDIA PTX ISA

Semantics

d = p ? a : b.

Sources