slct GPU Virtual ISA NVIDIA
slct Comparison and Selection Instructions
slct.dtype.s32 d, a, b, c;
Conditional selection.
Encoding
PTX is a virtual instruction set. It has no single, stable native
binary encoding - the compiler lowers this instruction to different native machine
code depending on the selected NVIDIA target architecture (compute capability).
This page intentionally shows no bit-diagram; see the target/version requirements
below for what governs how this instruction compiles.
Syntax Forms
One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.
| Syntax | Data Types | State Space(s) | Modifiers | Min. Target | Description |
|---|---|---|---|---|---|
| slct.dtype.s32 d, a, b, c; | sm_13 | Conditional selection. If c >= 0, a is stored in d, otherwise b is stored in d. (see the official PTX ISA docs for the full description) |
Operands
-
d
Destination register -
a
Source operand -
b
Source operand -
c
Source operand
At a Glance
Related
Reference
NVIDIA PTX ISA
Description
Conditional selection. If c >= 0, a is stored in d, otherwise b is stored in d. Operands d, a, and b are treated as a bitsize type of the same width as the first
instruction type; operand c must match the second instruction type (.s32 or.f32 ). The
selected input is copied to the output without modification.
Semantics
d = (c >= 0) ? a : b;
Examples
slct.u32.s32 x, y, z, val;
slct.ftz.u64.f32 A, B, C, fval;Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.
Sources
-
Parallel Thread Execution ISA ↗
- NVIDIA Corporation, Chapter 9 - Instruction Set
Deep-linked directly to this instruction's section.