ds_permute_b32 GPU Native ISA AMD Vector

Lane Operations

ds_permute_b32 VDST, ADDR, DATA

Forward-permute: each lane sends its value to a lane index computed by another lane, via the LDS crossbar (no LDS storage consumed).

Encoding

Binary Layout (AMD CDNA 5)
VDST
63:56
DATA1
55:48
DATA0
47:40
ADDR
39:32
110110
31:26
10110010
25:18
unassigned
17:16
OFFSET1
15:8
OFFSET0
7:0
 

The ENC_VDS layout from AMD's machine-readable ISA specification (AMD CDNA 5). Opcode 178 in OP rebuilds 0x00000000DAC80000, an identifier AMD lists for this encoding. Bits marked unassigned have no field in the specification. Not the same in every generation: AMD CDNA 4 (encoding ENC_DS, opcode 62, field layout), AMD CDNA 3 (encoding ENC_DS, opcode 62, field layout), AMD CDNA 2 (encoding ENC_DS, opcode 62, field layout), AMD CDNA 1 (encoding ENC_DS, opcode 62, field layout), AMD RDNA 3.5 (encoding ENC_DS, field layout), AMD RDNA 3 (encoding ENC_DS, field layout), AMD RDNA 2 (encoding ENC_DS, field layout), AMD RDNA 1 (encoding ENC_DS, field layout). The same in AMD RDNA 4.

Format DS
Width 64 bits
Opcode 178
Identifier 0x00000000DAC80000
Execution Unit LDS Unit
Register Classes VGPR

Operands

  • VDST
    Destination VGPR
  • ADDR
    Per-lane destination-lane selector
  • DATA
    Per-lane value to send

GFX Target Compatibility

TargetSupport
gfx942✅ Supported
gfx1100✅ Supported

Related PTX Concepts

Lane Shuffle ↗
equivalent with restrictions
shfl (PTX)

Related

More in Lane Operations

Reference

AMDGPU / GFX ISA

Description

Forward permute. This does not access LDS memory and may be called even if no LDS memory is allocated to the wave. It uses LDS to implement an arbitrary swizzle across threads in a wavefront.

Semantics

VDST[dst_lane(lane)] = DATA[lane], where dst_lane is computed per-lane from ADDR; lanes that receive no value read undefined/zero depending on target.

Example

ds_permute_b32  v1, v0, v2   // v1[lane] = v2[dest_lane(v0[lane])]

Original illustrative example, written for this site (not reproduced from a specific AMD document).

Sources