ds_max_src2_i32 GPU Native ISA AMD Vector
DS MAX SRC2 I32 LDS / Data Share
ds_max_src2_i32
AMDGPU DS vector instruction operating on i32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.)
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (DS)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in LDS / Data Share
Reference
AMDGPU / GFX ISA
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project