suld GPU Virtual ISA NVIDIA

suld Surface Instructions

suld.b.geom{.cop}.vec.dtype.clamp d, [a, b]; // unformatted

suld.b.{1d,2d,3d} Load from surface memory using a surface coordinate vector.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.5
Minimum Target sm_20

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
suld.b.geom{.cop}.vec.dtype.clamp d, [a, b]; // unformatted sm_20 suld.b.{1d,2d,3d} Load from surface memory using a surface coordinate vector. The instruction loads data from the surface named by operand a at coordinates given by operand b into destination d. (see the official PTX ISA docs for the full description)

Operands

At a Glance

Data Types -

Related AMDGPU Concepts

Surface/Image Load ↗
equivalent with restrictions
image_load (AMDGPU)

Related

More in Surface Instructions

Reference

NVIDIA PTX ISA

Description

suld.b.{1d,2d,3d} Load from surface memory using a surface coordinate vector. The instruction loads data from the surface named by operand a at coordinates given by operand b into destination d. Operand a is a.surfref variable or.u64 register. Operand b is a scalar or singleton tuple for 1d surfaces; is a two-element vector for 2d surfaces; and is a four-element vector for 3d surfaces, where the fourth element is ignored. Coordinate elements are of type.s32. suld.b performs an unformatted load of binary data. (see the official PTX ISA docs for the full description)

Examples

suld.b.1d.v4.b32.trap  {s1,s2,s3,s4}, [surf_B, {x}];
suld.b.3d.v2.b64.trap  {r1,r2}, [surf_A, {x,y,z,w}];
suld.b.a1d.v2.b32      {r0,r1}, [surf_C, {idx,x}];
suld.b.a2d.b32         r0, [surf_D, {idx,x,y,z}];  // z ignored

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources