Zvbb Instructions

14 RISC-V instructions in this extension - click any row for encoding, pseudocode, and full documentation.

Mnemonic ⇅	Syntax	Format ⇅	Summary
VANDN.VV	VANDN.VV vd, vs2, vs1, vm	OPIVV	Computes vd = vs2 & ~vs1 (bitwise AND with inverted source).
VANDN.VX	VANDN.VX vd, vs2, rs1, vm	OPIVX	Computes vd = vs2 & ~rs1.
VBREV8.V	VBREV8.V vd, vs2, vm	OPIVV	Reverses the bits within each byte of the source elements.
VCLZ.V	VCLZ.V vd, vs2, vm	OPIVV	Counts the number of leading zero bits in each element.
VCPOP.V	VCPOP.V vd, vs2, vm	OPIVV	Counts the number of set bits (1s) in each element.
VCTZ.V	VCTZ.V vd, vs2, vm	OPIVV	Counts the number of trailing zero bits in each element.
VREV8.V	VREV8.V vd, vs2, vm	OPIVV	Reverses the order of bytes within each element (Endian swap).
VROL.VV	VROL.VV vd, vs2, vs1, vm	OPIVV	Rotates bits in elements of vs2 left by amounts in vs1.
VROL.VX	VROL.VX vd, vs2, rs1, vm	OPIVX	Rotates bits in elements of vs2 left by scalar rs1.
VROR.VV	VROR.VV vd, vs2, vs1, vm	OPIVV	Rotates bits in elements of vs2 right by amounts in vs1.
VROR.VX	VROR.VX vd, vs2, rs1, vm	OPIVX	Rotates bits in elements of vs2 right by scalar rs1.
VWSLL.VI	VWSLL.VI vd, vs2, imm, vm	OPIVI	Shifts elements left by immediate, widening the result.
VWSLL.VV	VWSLL.VV vd, vs2, vs1, vm	OPIVV	Shifts N-bit elements left to produce 2*N-bit results.
VWSLL.VX	VWSLL.VX vd, vs2, rs1, vm	OPIVX	Shifts elements left by scalar rs1, widening the result.