nanosleep GPU Virtual ISA NVIDIA

nanosleep Miscellaneous Instructions

nanosleep.u32 t;

Suspends the thread for a sleep duration approximately close to the delay t, specified in nanoseconds.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 6.3
Minimum Target sm_70

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
nanosleep.u32 t; sm_70 Suspends the thread for a sleep duration approximately close to the delay t, specified in nanoseconds. (see the official PTX ISA docs for the full description)

Operands

  • t
    Operand

At a Glance

Data Types -

Related

More in Miscellaneous Instructions

Reference

NVIDIA PTX ISA

Description

Suspends the thread for a sleep duration approximately close to the delay t, specified in nanoseconds. t may be a register or an immediate value. The sleep duration is approximated, but guaranteed to be in the interval [0, 2*t]. The maximum sleep duration is 1 millisecond. The implementation may reduce the sleep duration for individual threads within a warp such that all sleeping threads in the warp wake up together.

Examples

.reg .b32 r;
.reg .pred p;

nanosleep.u32 r;
nanosleep.u32 42;
@p nanosleep.u32 r;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources