movmatrix GPU Virtual ISA NVIDIA

movmatrix Warp Level Matrix Multiply-Accumulate Instructions

movmatrix.sync.aligned.shape.trans.type d, a;

Move a row-major matrix across all threads in a warp, reading elements from source a, and writing the transposed elements to destination d.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 7.8
Minimum Target sm_75

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
movmatrix.sync.aligned.shape.trans.type d, a; sm_75 Move a row-major matrix across all threads in a warp, reading elements from source a, and writing the transposed elements to destination d. The. (see the official PTX ISA docs for the full description)

Operands

  • d
    Destination register
  • a
    Source operand

At a Glance

Data Types -

Related

More in Warp Level Matrix Multiply-Accumulate Instructions

Reference

NVIDIA PTX ISA

Description

Move a row-major matrix across all threads in a warp, reading elements from source a, and writing the transposed elements to destination d. The.shape qualifier indicates the dimensions of the matrix being transposed. Each matrix element holds 16-bit data as indicated by the.type qualifier. The mandatory.sync qualifier indicates that movmatrix causes the executing thread to wait until all threads in the warp execute the same movmatrix instruction before resuming execution. The mandatory.aligned qualifier indicates that all threads in the warp must execute the same movmatrix instruction. (see the official PTX ISA docs for the full description)

Examples

.reg .b32 d, a;
movmatrix.sync.aligned.m8n8.trans.b16 d, a;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources