ex2 GPU Virtual ISA NVIDIA
ex2 Half Precision Floating-Point Instructions
ex2.approx{.ftz}.f32 d, a;
Raise 2 to the power a.
Encoding
PTX is a virtual instruction set. It has no single, stable native
binary encoding - the compiler lowers this instruction to different native machine
code depending on the selected NVIDIA target architecture (compute capability).
This page intentionally shows no bit-diagram; see the target/version requirements
below for what governs how this instruction compiles.
Syntax Forms
One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.
| Syntax | Data Types | State Space(s) | Modifiers | Min. Target | Description |
|---|---|---|---|---|---|
| ex2.approx{.ftz}.f32 d, a; | sm_75 | Raise 2 to the power a. | |||
| ex2.approx.atype d, a; | sm_75 | Raise 2 to the power a. The type of operands d and a are as specified by.type. For.f16x2 or. (see the official PTX ISA docs for the full description) |
Operands
-
d
Destination register -
a
Source operand
At a Glance
Related AMDGPU Concepts
Related
Reference
NVIDIA PTX ISA
Description
Raise 2 to the power a.
The type of operands d and a are as specified by.type.
For.f16x2 or.bf16x2 instruction type, each of the half-word operands are operated in
parallel and the results are packed appropriately into a.f16x2 or.bf16x2.
For.f16 instruction type, operands d and a have.f16 or.b16 type.
For.f16x2 instruction type, operands d and a have.f16x2 or.b32 type.
For.bf16 instruction type, operands d and a have.b16 type.
For.bf16x2 instruction type, operands d and a have.b32 type.
Semantics
if (.type == .f16 || .type == .bf16) {
d = 2 ^ a
} else if (.type == .f16x2 || .type == .bf16x2) {
fA[0] = a[0:15];
fA[1] = a[16:31];
d[0] = 2 ^ fA[0]
d[1] = 2 ^ fA[1]
}
Examples
ex2.approx.ftz.f32 xa, a;
ex2.approx.f16 h1, h0;
ex2.approx.f16x2 hd1, hd0;
ex2.approx.ftz.bf16 b1, b2;
ex2.approx.ftz.bf16x2 hb1, hb2;Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.
Sources
-
Parallel Thread Execution ISA ↗
- NVIDIA Corporation, Chapter 9 - Instruction Set
Deep-linked directly to this instruction's section.