tanh GPU Virtual ISA NVIDIA

tanh Half Precision Floating-Point Instructions

tanh.approx.f32 d, a;

Take hyperbolic tangent value of a.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 7.0
Minimum Target sm_75

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
tanh.approx.f32 d, a; sm_75 Take hyperbolic tangent value of a. The operands d and a are of type.f32.
tanh.approx.type d, a; sm_75 Take hyperbolic tangent value of a. The type of operands d and a are as specified by.type. For.f16x2 or. (see the official PTX ISA docs for the full description)

Operands

  • d
    Destination register
  • a
    Source operand

At a Glance

Data Types -

Related AMDGPU Concepts

Hyperbolic Tangent ↗
equivalent with restrictions
v_tanh_f32 (AMDGPU)

Reference

NVIDIA PTX ISA

Description

Take hyperbolic tangent value of a. The type of operands d and a are as specified by.type. For.f16x2 or.bf16x2 instruction type, each of the half-word operands are operated in parallel and the results are packed appropriately into a.f16x2 or.bf16x2. For.f16 instruction type, operands d and a have.f16 or.b16 type. For.f16x2 instruction type, operands d and a have.f16x2 or.b32 type. For.bf16 instruction type, operands d and a have.b16 type. For.bf16x2 instruction type, operands d and a have.b32 type.

Semantics

if (.type == .f16 || .type == .bf16) { d = tanh(a) } else if (.type == .f16x2 || .type == .bf16x2) { fA[0] = a[0:15]; fA[1] = a[16:31]; d[0] = tanh(fA[0]) d[1] = tanh(fA[1]) }

Examples

tanh.approx.f32 ta, a;

tanh.approx.f16    h1, h0;
tanh.approx.f16x2  hd1, hd0;
tanh.approx.bf16   b1, b0;
tanh.approx.bf16x2 hb1, hb0;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources