add.cc GPU Virtual ISA NVIDIA

add.cc Extended-Precision Integer Arithmetic Instructions

add.cc.type d, a, b;

Performs integer addition and writes the carry-out value into the condition code register.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.2
Minimum Target sm_20

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
add.cc.type d, a, b; sm_20 Performs integer addition and writes the carry-out value into the condition code register.

Operands

  • d
    Destination register
  • a
    Source operand
  • b
    Source operand

At a Glance

Data Types -

Related AMDGPU Concepts

Add with Carry-Out ↗
equivalent with restrictions
v_add_co_u32 (AMDGPU)
s_add_u32 (AMDGPU)

Related

More in Extended-Precision Integer Arithmetic Instructions

Reference

NVIDIA PTX ISA

Semantics

d = a + b;

Examples

@p  add.cc.u32   x1,y1,z1;   // extended-precision addition of
@p  addc.cc.u32  x2,y2,z2;   // two 128-bit values
@p  addc.cc.u32  x3,y3,z3;
@p  addc.u32     x4,y4,z4;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources